Fortunately, PCB EDA programs provide design rule features that make this type of routing rather easy. Signals routed between components, e.g., in a PCIe subsystem, will need to be routed with the same length and timing matching techniques that are used with parallel data buses. Computer motherboards and their peripherals will use either of these clocking schemes as it becomes more difficult to properly route a single system clock as a board size increases. The other scheme is source-synchronous clocking, where the clock signal is routed in parallel with the data stream. This difficulty is the reason many components use embedded clocking, where the clock signal is embedded in the first few bits of a data stream. This problem with timing arises due to the propagation delay of each component in the chain. Using a system clock in this point-to-point topology requires ultra-precise timing, which can be rather difficult with conventional EDA tools. Doing this properly requires accounting for propagation delay in your components, which becomes extremely difficult as the number of components in a point-to-point chain increases. The goal is to ensure data signals latch in the receiver at the correct time.
If you’re using an XTAL oscillator circuit as a system clock for a series of point-to-point functional blocks, you’ll have difficulties in routing your clock lines as you need to ensure clock signals arrive at the each component at the same time as the signals. There are some other important recommendations you should follow, which relate to the type of clocking used and EMI suppression. Any capacitors should be stable and have sufficiently high self-resonance frequency (ideally, beyond the 3rd to 5th harmonics of the clock signal). Place any capacitors on the output close to the output pins on the clock component.Try to prevent return currents from other signals from travelling beneath the clock output.Instead, simply use an internal ground plane. Do not put copper pour on the surface layer below the clock. If needed, use copper pour to isolate the clock from other circuits.The goal is to reduce capacitive crosstalk between the XTAL oscillator circuit (specifically, the output pins) and other PCB circuits. Place the oscillator away from other high frequency/high speed signals.I’ve compiled some of the basic tips for laying out any XTAL oscillator circuit in the list below. quartz), and some are related to your layout ( insufficient PDN decoupling can be one major source of jitter). Some of these points are related to the chemical composition of your oscillator (ceramic vs. Your goal in laying out an XTAL oscillator circuit is to ensure your clock signal is properly isolated from other components, and that there is minimal drift and jitter/phase noise on the output. Here’s what you need to know about XTAL oscillator circuit design and component selection, and when you need to start thinking about more stable high frequency oscillators.
As frequencies increase into the GHz regime, you’ll need to alter your strategy and choose a highly stable reference oscillator for your system. These components have varying levels of intrinsic jitter and temperature sensitivity, and choosing the right oscillator for your system is critical to ensuring accurate timing for digital and analog circuits. The XTALs you’ll find on the market can be manufactured for frequencies ranging from ~10 kHz to ~100 MHz. In addition to XTAL oscillator circuit layout, you need to select the right crystal that will provide stable timing. Your digital and analog subsystems in phone networks, digital watches, and even your microwave need stable oscillators for precise timing and moving data around digital circuits. Every year, billions of crystals are manufactured and are used in nearly every electronic device.